Advanced ASIC FPGA Verification Engineer (Sign-on Bonus Available)

Basic Qualifications Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 5+ years of job-related experience, or a Master's degree and 3 years of job-related experience. Clearance Requirements: Candidates must be able to obtain a U.S. Department of Defense TS/SCI security clearance within a reasonable amount of time from date of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required. Responsibilities for this Position Primary Job Qualifications: We encourage you to apply if you have any of these preferred skills or experiences: In-depth experience using RTL simulation tools such as Siemens Mentor Graphics Questa or Modelsim tools or equivalent in a Linux Environment In-depth knowledge of System Verilog object oriented programming and the Universal Verification Methodology (UVM) Understands UVM Testbench Architectures Comfortable using and developing UVM agents , bus functional models Understands different types of coverage , usage of cover classes, cover points, etc Experience with predictive testbench components, functional coverage and assertions Experience with constrained random testing Experience with the Register Abstraction Layer Familiarity with requirements-based verification , requirement