Silicon Physical Design Engineer V

Fresh Consulting is a design-led, software development and hardware engineering company, offering end-to-end digital services to help companies innovate. We bring together amazing UX designers, sophisticated developers, digital strategists, and top-notch engineers to help companies create fresh experiences that connect humans, systems, and machines. We've been growing fast and need someone to help us continue to manage the delivery of high-quality work in a fast-paced environment. See more at freshconsulting.com. Visit freshconsulting.com/portfolio to see our project work across several industries. View and apply to all jobs – or visit freshconsulting.com/careers. Title: Silicon Physical Design Engineer V Duration: 1-year contract with likely extension (up to 2 years) Location: Remote – must work Pacific Time (PST) hours Benefits: Employee benefits at 100% including Medical, PTO, Holiday Pay, 401K Plan and much more! Role: Set up and maintain PPRTL and PTPX power analysis flows (average and time-based/peak power) Generate and manage activity inputs (FSDB/VCD/SAIF) from RTL and gate-level simulations; handle long-waveform and windowed analysis Correlate RTL-level power estimates against gate-level signoff power and explain deltas Produce per-block, per-hierarchy, and per-workload power breakdowns; identify top power contributors and clock/datapath waste Recommend and evaluate power reduction opportunities (clock gating efficiency, datapath gating, memory power, idle leakage) A